In progress
Building a CPU from logic gates in Turing Complete
Three long-term learning goals for Turing Complete's sandbox mode, not a fixed schedule: a 16-bit Hack core, then 32-bit RV32I and Armv6-M cores. Each core has an explicit instruction set architecture (ISA); how to build its circuit is worked out during the design.
- Turing Complete
- Hack
- RV32I
- Armv6-M