Project 02
Three long-term learning goals for Turing Complete's sandbox mode, not a fixed schedule: a 16-bit Hack core, then 32-bit RV32I and Armv6-M cores. Each core has an explicit instruction set architecture (ISA); how to build its circuit is worked out during the design.
Run Hack machine-language programs such as Add and Max on a 16-bit core with separate instruction ROM and data RAM (Harvard architecture). Build an RV32I core without a pipeline first, then cover the complete base integer ISA, with a five-stage pipeline as a later challenge. Then take on an Armv6-M/Thumb core modelled on Cortex-M0+, with exceptions, interrupts, a two-stage pipeline and its shared system bus, and call it compatible only once that is verified.
Build NOT, AND, OR, NOR and XOR from NAND, combine two-input gates into wider ones, and see how propagation delay sets the longest path.
Widen one-bit signals into multi-bit data: binary numbers and their arithmetic first, then adders, latches and registers, so a circuit can keep a result it has computed and use it in the next operation.
A 16-bit core for the Hack ISA with separate instruction ROM and data RAM, running Hack programs such as Add and Max.
A 32-bit RV32I core: first without a pipeline, then the complete base integer ISA; a five-stage pipeline comes later.
A 32-bit Armv6-M/Thumb core modelled on Cortex-M0+, adding exceptions, interrupts and a two-stage pipeline.
As the project develops, I will add the questions, implementation notes, and test results from each stage here.
Published
Starting from NAND, I build NOT, AND, OR, NOR, XOR, XNOR and three-input gates in Turing Complete, check each one against its truth table, and look at propagation delay: why the output changes a little after the input. The second half works through five combinational logic exercises, deriving the wiring from truth tables, and ends with what Boolean algebra does inside a CPU.
Published
After logic gates: the parts a simple CPU core needs and the circuits to meet first inside the ALU, then one addition traced through fetching, decoding, computing and saving, to show why a result has to be stored once it is computed. It ends by matching what comes next to chapters of CS:APP.
Published
How to read and calculate in binary, for unsigned integers: place values and bit width, converting to and from decimal, carrying and borrowing, multiplication and division, bitwise operations and parity, and a few shortcuts along with the limits of a fixed width. It ends with an interactive drill: pick place values from 128 down to 1 to make a target number.
Published
Six circuit exercises connect logic to arithmetic: detecting at least two true inputs, odd parity, counting four signals, half adders, full adders, and doubling a byte by rewiring its bits. Wiring diagrams and truth tables explain each step, including why the last circuit only doubles inputs from 0 to 127.
Published
Build byte-wide NOT and NAND circuits, connect eight full adders through their carry signals, then use two's complement to represent negative numbers and wire a negation circuit. Diagrams and worked examples distinguish bitwise inversion from arithmetic negation, carry from signed overflow, and explain the special case of −128.
In progress
Notes in progress on retaining and updating state: feedback loops, holding a signal with OR, delaying input by two cycles, latches, flip-flops and alternating outputs. The current final section builds XOR from switches and explains high impedance and data selection; further data-control circuits will follow.